A programmable floating-gate voltage reference in 0.5 μm CMOS

Author

Cook, Seth A. ; Layton, Kent D. ; Marble, William J. ; Comer, Donald T. ; Comer, David J. ; Petrie, Craig

Author_Institution

AMI Semicond., American Fork, UT, USA

fYear

2004

fDate

3-6 Oct. 2004

Firstpage

647

Lastpage

650

Abstract

A floating-gate voltage reference (FGVREF) circuit is presented in which novel implementations of a transconductance amplifier and a transimpedance amplifier are combined to isolate the floating gate from the variations in temperature and power supply that adversely affect most FGVREF circuits. This FGVREF circuit uses this isolation to improve the power supply rejection ratio to greater than 80 dB and temperature coefficient to 54.6 ppm/°C while maintaining the size, programmability, and CMOS compatibility advantages as compared to typical bandgap references. The programmable FGVREF, which operates from a 2.8 V to 5.5 V supply, dissipates 100 μA from a 5 V supply and occupies an area of less than 0.011 mm² in a 0.5 μm CMOS process.

Keywords

CMOS analogue integrated circuits; circuit stability; programmable circuits; thermal stability; voltage regulators; 0.5 micron; 100 muA; 2.8 to 5.5 V; CMOS; floating gate isolation; power supply rejection ratio; power supply variations; programmable floating-gate voltage reference; temperature coefficient; temperature variations; transconductance amplifier; transimpedance amplifier; CMOS technology; Circuits; MOSFETs; Operational amplifiers; Parasitic capacitance; Photonic band gap; Power supplies; Resistors; Temperature; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004

Print_ISBN

0-7803-8495-4

Type

conf

DOI

10.1109/CICC.2004.1358909

Filename

1358909