Title :
Infrastructure for modular SOC testing
Author :
Marinissen, Erik Jan ; Waayers, Tom
Author_Institution :
Philips Res. Labs., Eindhoven, Netherlands
Abstract :
Large single-die system chips are designed in a modular fashion, including and reusing pre-designed and pre-verified design blocks. Modular testing is required for embedded non-logic modules and black-boxed IP cores. Also, modular testing is attractive for other blocks, as it supports ´divide-n-conquer´ test generation and test reuse. Modular testing requires an on-chip infrastructure. This tutorial paper gives insight in the principles behind modular testing and its need for a dedicated on-chip test infrastructure. The paper describes the IEEE standard 1500 test wrapper for embedded modules and the basics of SOC-level test architecture design in relation to test time optimization. In addition, two application examples are given to illustrate current industrial practices.
Keywords :
IEEE standards; automatic test equipment; built-in self test; embedded systems; integrated circuit design; integrated circuit testing; system-on-chip; IEEE standard 1500 test wrapper; black-boxed IP cores; embedded core test; embedded modules; embedded nonlogic modules; modular SOC testing infrastructure; on-chip testing infrastructure; predesigned blocks; preverified blocks; single-die system chips; test access mechanism; test architecture; test generation; test reuse; test time optimization; Circuit testing; Design optimization; Industrial relations; Integrated circuit testing; Laboratories; Logic testing; Modems; Pins; Silicon; System testing;
Conference_Titel :
Custom Integrated Circuits Conference, 2004. Proceedings of the IEEE 2004
Print_ISBN :
0-7803-8495-4
DOI :
10.1109/CICC.2004.1358916
