DocumentCode
1951047
Title
Enforcing I/O sequences for PLC validation purposes
Author
Guignard, Anais ; Faure, Jean-Marc
Author_Institution
Automated Production Res. Lab. LURPA, Ecole Normale Super. de Cachan, Cachan, France
fYear
2013
fDate
10-13 Sept. 2013
Firstpage
1
Lastpage
6
Abstract
Validation of the behavior of a Programmable Logic Controller (PLC) by comparison of observed I/O sequences to sequences built from a formal specification model requires that the consequences of the PLC I/O scanning cycle be considered. This paper proposes a method based on an enforcement technique to interpret observed I/O sequences so that the result of this comparison be meaningful.
Keywords
control engineering computing; formal specification; formal verification; programmable controllers; I/O sequences; PLC I/O scanning cycle; PLC validation purposes; formal specification model; programmable logic controller; Automata; Biological system modeling; Input variables; Laboratories; Monitoring; Production; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Emerging Technologies & Factory Automation (ETFA), 2013 IEEE 18th Conference on
Conference_Location
Cagliari
ISSN
1946-0740
Print_ISBN
978-1-4799-0862-2
Type
conf
DOI
10.1109/ETFA.2013.6648100
Filename
6648100
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