Flash lamp annealing technology for ultra-shallow junction formation

Author

Ito, T. ; Suguro, K. ; Tamura, M. ; Taniguchi, T. ; Ushiku, Y. ; Iinuma, T. ; Itani, T. ; Yoshioka, M. ; Owada, T. ; Imaoka, Y. ; Murayama, H. ; Kusuda, T.

Author_Institution

Process & Manuf. Eng. Center, Toshiba Corp., Yokohama, Japan

fYear

2002

fDate

2-3 Dec. 2002

Firstpage

23

Lastpage

26

Abstract

As a new method of activating implanted impurities, flash lamp annealing (FLA) technology is proposed. By optimizing FLA and implantation conditions, junction depth of 14 nm and the sheet resistance of 770 /spl Omega//sq. with good junction leakage were successfully obtained for p/sup +//n junctions without wafer slip and warpage problems.

Keywords

electric resistance; impurities; incoherent light annealing; leakage currents; p-n junctions; 14 nm; flash lamp annealing technology; implanted impurities; junction depth; junction leakage current; p-n junctions; sheet resistance; ultra shallow junction formation; wafer slip; Electrical resistance measurement; Electronic equipment manufacture; Heating; Indium tin oxide; Lamps; MOSFETs; Manufacturing processes; Rapid thermal annealing; Semiconductor device manufacture; Temperature;

fLanguage

English

Publisher

ieee

Conference_Titel

Junction Technology, 2002. IWJT. Extended Abstracts of the Third International Workshop on

Conference_Location

Tokyo, Japan

Print_ISBN

4-89114-028-3

Type

conf

DOI

10.1109/IWJT.2002.1225191

Filename

1225191