• DocumentCode
    1951312
  • Title

    Application Experiments: MPPA and FPGA

  • Author

    Top, Philip ; Gokhale, Maya

  • Author_Institution
    Lawrence Livermore Nat. Lab., Livermore, CA, USA
  • fYear
    2009
  • fDate
    5-7 April 2009
  • Firstpage
    291
  • Lastpage
    294
  • Abstract
    This paper describes the mapping approach, programmability, and performance of the Ambric massively parallel processor array (MPPA), and compares these aspects to an FPGA. Two application kernels, a trellis decoder, and n-gram frequency counter, were ported to the Ambric development system and an Altera Stratix II. We find that the mapping strategies to Ambric and FPGAs are similar at the high level, but diverge quite a bit in implementation due to differences in granularity between the basic compute units of the two devices. Both require substantial refactoring from the baseline sequential algorithm. The FPGA proved superior in terms of performance, but the Ambric fares significantly better than the FPGA in programmability and ease of application development.
  • Keywords
    field programmable gate arrays; parallel processing; system-on-chip; Altera Stratix II; Ambric development system; Ambric massively parallel processor array; TeraOp system-on-chip; baseline sequential algorithm; field programmable gate array; n-gram frequency counter; trellis decoder; Application software; Bioinformatics; Computer applications; Computer architecture; Decoding; Field programmable gate arrays; Frequency; Kernel; Laboratories; Software algorithms; Ambric; MPPA;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Custom Computing Machines, 2009. FCCM '09. 17th IEEE Symposium on
  • Conference_Location
    Napa, CA
  • Print_ISBN
    978-0-7695-3716-0
  • Type

    conf

  • DOI
    10.1109/FCCM.2009.37
  • Filename
    5290896