Correlation of plasma process induced charging with Fowler-Nordheim stress in p- and n-channel transistors

Author

Lee, Y.-H. ; Yau, L. ; Chau, R. ; Hansen, E. ; Sabi, B. ; Hui, S. ; Moon, P. ; Vandentop, G.

Author_Institution

Intel Corp., Hillsboro, OR, USA

fYear

1992

fDate

13-16 Dec. 1992

Firstpage

65

Lastpage

68

Abstract

We simulated plasma etch induced gate charging by using a Fowler-Nordheim (F-N) stress, and compared the resulting degradation with end-of-line (EOL) antenna transistors in a triple-layer metal CMOS technology. Our studies show good agreement between the effects of F-N current stress and plasma processing induced device deterioration very well. This is also the first known work to explain the effects of in-process plasma charging on p-channel hot-electron reliability.<>

Keywords

CMOS integrated circuits; circuit reliability; electron traps; hole traps; hot carriers; interface electron states; plasma applications; semiconductor process modelling; static electrification; Fowler-Nordheim stress; n-channel transistors; p-channel hot-electron reliability; plasma process induced charging; processing induced device deterioration; triple-layer metal CMOS technology; CMOS integrated circuits; Charge carrier lifetime; Circuit reliability; Hot carriers; Interface phenomena; Plasma applications; Semiconductor process modeling; Surface charging;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1992. IEDM '92. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-0817-4

Type

conf

DOI

10.1109/IEDM.1992.307310

Filename

307310