Title :
FPGA Implementation of a Single-Precision Floating-Point Multiply-Accumulator with Single-Cycle Accumulation
Author :
Paidimarri, Arun ; Cevrero, Alessandro ; Brisk, Philip ; Ienne, Paolo
Author_Institution :
Indian Inst. of Technol. Bombay, Mumbai, India
Abstract :
This paper describes an FPGA implementation of a single-precision floating-point multiply-accumulator (FPMAC) that supports single-cycle accumulation while maintaining high clock frequencies. A non-traditional internal representation reduces the cost of mantissa alignment within the accumulator. The FPMAC is evaluated on an Altera Stratix III FPGA.
Keywords :
field programmable gate arrays; floating point arithmetic; multiplying circuits; Altera Stratix III FPGA; FPGA implementation; single-cycle accumulation; single-precision floating-point multiply-accumulator; Clocks; Compressors; Concurrent computing; Costs; Degradation; Feedback; Field programmable gate arrays; Frequency; Logic; Pipelines;
Conference_Titel :
Field Programmable Custom Computing Machines, 2009. FCCM '09. 17th IEEE Symposium on
Conference_Location :
Napa, CA
Print_ISBN :
978-0-7695-3716-0
DOI :
10.1109/FCCM.2009.50
