DocumentCode :
1951693
Title :
Automated analog filter pair design on the basis of a gyrator-capacitor prototype circuit realised in SI technique
Author :
Melosik, Michal ; Naumowicz, Mariusz ; Katarzynski, Piotr ; Szczesny, Szymon ; Handkiewicz, Andrzej
Author_Institution :
Dept. of Comput. Eng., Poznan Univ. of Technol., Poznan, Poland
fYear :
2012
fDate :
19-21 Sept. 2012
Firstpage :
33
Lastpage :
36
Abstract :
The paper presents an algorithmic approach to low sensitive design strategy for switched-current(SI) filter pairs based on a gyrator-capacitor prototype circuit. There is EDA software suite presented its cooperation with associated commercial tools. The functionalities of EDA system are illustrated by the design of filter pair of 5th order that was further realised in TSMC 0.18μm CMOS MS/RF technology. The filter operates at 1.8 V power supply voltage and consumes 2.5 mW. Post layout simulation results are presented and compared with ideal characteristics.
Keywords :
CAD; CMOS analogue integrated circuits; capacitors; electronic engineering computing; filters; gyrators; integrated circuit design; switched current circuits; EDA software; EDA system; SI filter pair; SI technique; TSMC CMOS MS/RF technology; automated analog filter pair design; gyrator-capacitor prototype circuit; low sensitive design strategy; post layout simulation; power 2.5 mW; power supply voltage; size 0.18 mum; switched-current filter pair; voltage 1.8 V; CMOS integrated circuits; CMOS technology; Layout; Prototypes; Silicon; Transfer functions; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2012 International Conference on
Conference_Location :
Seville
Print_ISBN :
978-1-4673-0685-0
Type :
conf
DOI :
10.1109/SMACD.2012.6339410
Filename :
6339410
Link To Document :
بازگشت