DocumentCode :
1951702
Title :
Optimization of fully-integrated power converter circuits comprising tapered inductor layout and temperature effects
Author :
Callemeyn, Piet ; De Jonghe, Dimitri ; Gielen, Georges ; Steyaert, Michiel
Author_Institution :
ESAT-MICAS, KU Leuven, Leuven, Belgium
fYear :
2012
fDate :
19-21 Sept. 2012
Firstpage :
37
Lastpage :
40
Abstract :
A technique for the optimization of fully-integrated inductive DC-DC converters is presented. An optimization framework is used to acquire an optimal converter, focusing on the on-chip inductor as well as on the accurate layout-based modeling of temperature effects. For the inductor in inductive DC-DC converters, a tapered topology is introduced. A fully-integrated DC-DC boost converter is designed and optimized in a 0.13 μm CMOS technology. The power loss in the circuit is reduced with 27 % resulting in a 7 % efficiency improvement, compared to a fully-integrated DC-DC boost converter with a regular inductor topology.
Keywords :
CMOS integrated circuits; DC-DC power convertors; inductors; integrated circuit layout; optimisation; CMOS technology; DC-DC boost converter; fully-integrated inductive DC-DC converters; fully-integrated power converter circuits; on-chip inductor; optimization; size 0.13 mum; tapered inductor layout; tapered topology; temperature effects; Inductors; Integrated circuit modeling; Metals; Optimization; Resistance; Substrates; Topology;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2012 International Conference on
Conference_Location :
Seville
Print_ISBN :
978-1-4673-0685-0
Type :
conf
DOI :
10.1109/SMACD.2012.6339411
Filename :
6339411
Link To Document :
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