Title :
Achieving uniform nMOS device power distribution for sub-micron ESD reliability
Author :
Duvvury, C. ; Diaz, C. ; Haddock, T.
Author_Institution :
Semicond. Process & Design Center, Texas Instrum. Inc., Dallas, TX, USA
Abstract :
The ESD reliability of the advanced sub-micron technologies is a major concern because of the shallow LDD junctions. This paper will show that by achieving uniform power distribution during the entire ESD event in a large multi-finger nMOS device of 0.6 mu m technology, protection levels in excess of 10 kV can be realized. The evidence of this uniform power distribution resulting from the multi-finger parasitic npn turn-on is shown through an emission microscopy analysis.<>
Keywords :
CMOS integrated circuits; circuit reliability; electrostatic discharge; metal-insulator-semiconductor devices; 0.6 micron; 10 kV; CMOS technology; emission microscopy analysis; multi-finger nMOS device; parasitic npn turn-on; protection levels; shallow LDD junctions; sub-micron ESD reliability; uniform nMOS device power distribution; CMOS integrated circuits; Circuit reliability; Electrostatic discharges; MIS devices;
Conference_Titel :
Electron Devices Meeting, 1992. IEDM '92. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-0817-4
DOI :
10.1109/IEDM.1992.307325
