Title :
30V new fine trench MOSFET with ultra low on-resistance
Author :
Ono, Syotaro ; Kawaguchi, Yusuke ; Nakagawa, Akio
Author_Institution :
Discrete Semicond. Div., Toshiba Corp. Semicond. Co., Kawasaki, Japan
Abstract :
The present paper proposes a new ultra low on-resistance trench MOSFET. The proposed device is characterized by the narrow high resistance n-epi layer between the two trench gates and the thin n-drift layer, which lies between the trench bottom and the n+ substrate. The high resistance n-epi between the trenches is always depleted because of the built-in potential of the p+ gate poly, resulting in the normally-off characteristics without p-base. The thin n-drift layer enables the use of thin gate oxide. The optimum doping concentration and thickness of the n-drift is chosen so that the on-resistance is minimized. The proposed trench MOSFET experimentally achieved a 33(V) drain-source blocking voltage and a 10mΩmm2 specific on-resistance at VGS=10V. This is the lowest Ron value ever reported.
Keywords :
MOSFET; integrated circuit design; semiconductor device models; 10 V; 30 V; built-in potential; doping concentration; drain-source blocking voltage; metal oxide semiconductor field effect transistor; n+ substrate; n-drift layer; n-epi layer; on-resistance; p+ gate poly; specific on-resistance; thin gate oxide; trench MOSFET; trench bottom; trench gate; Electrons; Facsimile; Impurities; Laboratories; Leakage current; Low voltage; MOSFET circuits; Numerical simulation; Paper technology; Substrates;
Conference_Titel :
Power Semiconductor Devices and ICs, 2003. Proceedings. ISPSD '03. 2003 IEEE 15th International Symposium on
Print_ISBN :
0-7803-7876-8
DOI :
10.1109/ISPSD.2003.1225223