DocumentCode
1951828
Title
VLSI Implementation of Autocorrelator and CORDIC Algorithm for OFDM Based WLAN
Author
Reddy, P. Sreenivasa ; Reddy, G. Ramachandra
Author_Institution
Dept. of ECE, Srikalahasteeswara Inst. of Technol., Srikalahasthi, India
fYear
2010
fDate
26-28 Feb. 2010
Firstpage
525
Lastpage
531
Abstract
This paper deals with design and VLSI implementation of autocorrelator and CORDIC algorithm for OFDM based WLAN using ASIC technology. The autocorrelator is used for frame detection and carrier frequency offset estimation. The CORDIC is used to estimate the frequency offset and to calculate division operation in the channel estimation algorithm. A fast pipelined CORDIC architecture and autocorrelator is designed and implemented using 130 nm ASIC design methodology. HDL and test-bench is developed to simulate and verify the functionality of both the modules. In this design, the total cell area, total dynamic power and required data time are noted as 59745 square microns,11.19 mW, 4.75 ns for autocorrelator and 12126 square microns, 3.48 mW, 4.73 ns for CORDIC modules respectually.
Keywords
OFDM modulation; VLSI; application specific integrated circuits; channel estimation; digital arithmetic; wireless LAN; ASIC technology; CORDIC algorithm; OFDM; VLSI; WLAN; autocorrelator; carrier frequency offset estimation; channel estimation; frame detection; power 11.19 mW; power 3.48 mW; size 130 nm; Algorithm design and analysis; Application specific integrated circuits; Autocorrelation; Channel estimation; Design methodology; Frequency conversion; Frequency estimation; OFDM; Very large scale integration; Wireless LAN; Autocorrelator; CORDIC; OFDM; VLSI; WLAN;
fLanguage
English
Publisher
ieee
Conference_Titel
Communication Software and Networks, 2010. ICCSN '10. Second International Conference on
Conference_Location
Singapore
Print_ISBN
978-1-4244-5726-7
Electronic_ISBN
978-1-4244-5727-4
Type
conf
DOI
10.1109/ICCSN.2010.41
Filename
5437723
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