Title :
Structured ASIC: Methodology and comparison
Author :
Ho, Sam M H ; Yuen, Steve C L ; Poon, Hiu Ching ; Chau, Thomas C P ; Ai, Yan-Qing ; Leong, Philip H W ; Choy, Oliver C S ; Pun, Kong-Pang
Author_Institution :
Dept. of Electron. Eng., Chinese Univ. of Hong Kong, Hong Kong, China
Abstract :
As fabrication process technology continues to advance, mask set costs have become prohibitively expensive. Structured ASICs can offer price and performance between ASICs and FPGAs. They are attractive for mid-volume production and offer good intellectual property security. In this paper, a structured ASIC methodology, where 2 metal- and 1 via-mask are customised, is described. The CAD tools are fully compatible with conventional ASIC design flows and a comparison of area and delay performance with ASICs and FPGAs is given. A prototype structured ASIC implementing an LED-backlit LCD controller was fabricated in a 0.13 μm CMOS process. It was verified and power consumption compared with an ASIC design.
Keywords :
CMOS integrated circuits; application specific integrated circuits; field programmable gate arrays; industrial property; integrated circuit design; masks; ASIC design; CAD tools; CMOS process; LED-backlit LCD controller; fabrication process technology; intellectual property security; mask set costs; power consumption; size 0.13 mum; structured ASIC methodology; Application specific integrated circuits; Delay; Field programmable gate arrays; Logic gates; Microprocessors; Table lookup;
Conference_Titel :
Field-Programmable Technology (FPT), 2010 International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-8980-0
DOI :
10.1109/FPT.2010.5681422
