DocumentCode :
1952134
Title :
Built-in current testing-feasibility study
Author :
Maly, W. ; Nigh, P.
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie-Mellon Univ., Pittsburgh, PA, USA
fYear :
1988
fDate :
7-10 Nov. 1988
Firstpage :
340
Lastpage :
343
Abstract :
A testing methodology which applies built-in current sensors to detect abnormal currents in the power buses of functional blocks of CMOS ICs is proposed, that significantly improves the quality of VLSI circuit testing. A summary of simulation results and design experiments is presented to demonstrate the feasibility and to illustrate the applicability of the approach. The results suggest that built-in current testing could be a very powerful tool for overcoming basic bottlenecks in VLSI testing, providing very inexpensive testing, high-quality built-in testing, or on-chip concurrent reliability testing for high-quality fault-tolerant systems.<>
Keywords :
CMOS integrated circuits; automatic testing; circuit analysis computing; electric current measurement; integrated circuit testing; CMOS ICs; VLSI circuit testing; abnormal currents; built-in current sensors; built-in current testing; design experiments; feasibility study; functional blocks; high-quality built-in testing; high-quality fault-tolerant systems; inexpensive testing; on-chip concurrent reliability testing; power buses; simulation results; testing methodology; Circuit simulation; Circuit testing; Costs; Fault tolerant systems; Modems; Power supplies; Power system reliability; System testing; System-on-a-chip; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design, 1988. ICCAD-88. Digest of Technical Papers., IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-0869-2
Type :
conf
DOI :
10.1109/ICCAD.1988.122524
Filename :
122524
Link To Document :
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