DocumentCode :
1952224
Title :
Reducing power consumption for Dynamically Reconfigurable Processor Array with Partially Fixed Configuration Mapping
Author :
Hironaka, Kazuei ; Kimura, Masayuki ; Saito, Yoshiki ; Sano, Toru ; Kato, Masaru ; Tunbunheng, Vasutan ; Yasuda, Yoshihiro ; Amano, Hideharu
Author_Institution :
Dept. of Inf. & Comput. Sci., Keio Univ., Yokohama, Japan
fYear :
2010
fDate :
8-10 Dec. 2010
Firstpage :
349
Lastpage :
352
Abstract :
The Partially Fixed Configuration Mapping (PFCM) is a context mapping technique for Dynamically Reconfigurable Processor Array (DRPA) focusing on reducing the power consumption. It assigns operations into Processing Elements (PEs) so as to keep the configuration of the previous context as possible. It reduces the changing part of the datapath structure on the PE array as well as its switching frequency. Preliminary evaluation results show that it can reduce the computing power by 6.7% - 11.3%. The demonstration shows the power reduction directly by using the real chip MuCCRA-3, a prototype of DRPA executing signal processing applications with and without applying PFCM. The design environment for using PFCM is also exhibited.
Keywords :
microprocessor chips; power aware computing; power consumption; PFCM design environment; dynamically reconfigurable processor array; partially fixed configuration mapping; power consumption reduction; processing elements; Arrays; Cameras; Context; Field programmable gate arrays; Power demand; Strontium; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Technology (FPT), 2010 International Conference on
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-8980-0
Type :
conf
DOI :
10.1109/FPT.2010.5681431
Filename :
5681431
Link To Document :
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