Prospects of high voltage power ICs on thin SOI

Author

Nakagawa, A. ; Yasuhara, N. ; Omura, I. ; Yamaguchi, Y. ; Ogura, T. ; Matsudai, T.

Author_Institution

Toshiba Corp., Kawasaki, Japan

fYear

1992

fDate

13-16 Dec. 1992

Firstpage

229

Lastpage

232

Abstract

Silicon on Insulator technology is promising for high voltage power IC applications. The required SOI layer thickness can be reduced if a large portion of the applied voltage is sustained by the bottom insulator layer. Combination of SOI and trenches or LOCOS has merits of simplified device isolation and high device packing density. Thin SOI layer will realize high-speed switching in high voltage devices because of the smaller amount of stored carriers. Substrate bias influences on device characteristics and potentials of SOI technology are discussed.<>

Keywords

integrated circuit technology; large scale integration; power integrated circuits; semiconductor-insulator boundaries; LOCOS; SOI layer thickness; device isolation; device packing density; high voltage power ICs; high-speed switching; silicon on insulator technology; stored carriers; substrate bias influences; thin SOI; trenches; Integrated circuit fabrication; Large-scale integration; Power integrated circuits; Semiconductor-insulator interfaces;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1992. IEDM '92. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Print_ISBN

0-7803-0817-4

Type

conf

DOI

10.1109/IEDM.1992.307348

Filename

307348