DocumentCode :
1952426
Title :
Register allocation for design of data format converters
Author :
Parhi, Keshab K. ; Lee, Joo-Sang
Author_Institution :
Dept. of Electr. Eng., Minnesota Univ., Minneapolis, MN, USA
fYear :
1991
fDate :
14-17 Apr 1991
Firstpage :
1133
Abstract :
The authors use life time analysis and propose systematic register allocation techniques to reuse the registers; register reuse leads to data format converter architectures with fewer registers. A simple forward-circulate allocation scheme is proposed to motivate the use of register allocation, and a more efficient forward-backward register allocation scheme is proposed. Examples of data converters presented include matrix transposer, serial-to-parallel, and parallel-to-serial converters. General m-to-n bit-parallel and bit-serial converters are also studied. It is shown that register allocation techniques can lead to up to 50% savings in hardware area, as compared with converter architectures designed in a straightforward manner
Keywords :
data conversion; sequential circuits; shift registers; storage allocation; converter architectures; data format converters; design; forward-backward register allocation; forward-circulate allocation; life time analysis; matrix transposer; parallel-to-serial converters; register reuse; serial to parallel converters; Circuit synthesis; Control system synthesis; Costs; Hardware; Image converters; Matrix converters; Pressing; Registers; Signal processing; Signal synthesis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, 1991. ICASSP-91., 1991 International Conference on
Conference_Location :
Toronto, Ont.
ISSN :
1520-6149
Print_ISBN :
0-7803-0003-3
Type :
conf
DOI :
10.1109/ICASSP.1991.150567
Filename :
150567
Link To Document :
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