Size-Reconfiguration Delay Tradeoffs for a Class of DSP Blocks in Multi-mode Communication Systems

In this paper we propose a spectrum of designs for filters in multi-mode communication systems. The proposed designs lie in between generic filter to fully optimized coefficient specific filter. For each design a reconfigurable section and a static section are defined. We propose an algorithm to optimize the size of the reconfigurable section of each design independently. We also propose another algorithm that optimizes the reconfiguration time overhead for a given sequence of designs. The results of our experiments show the trade-off between area and reconfiguration delay in the design space.