DocumentCode :
1952501
Title :
FPGA Accelerated Simulation of Biologically Plausible Spiking Neural Networks
Author :
Thomas, David B. ; Luk, Wayne
Author_Institution :
Dept. of Comput., Imperial Coll. London, London, UK
fYear :
2009
fDate :
5-7 April 2009
Firstpage :
45
Lastpage :
52
Abstract :
Artificial neural networks are a key tool for researchers attempting to understand and replicate the behaviour and intelligence found in biological neural networks. Software simulations offer great flexibility and the ability to select which aspects of biological networks to model, but are slow when operating on more complex biologically plausible models; while dedicated hardware solutions can be very fast, they are restricted to fixed models. This paper uses FPGAs to achieve a compromise between model complexity and simulation speed, such that a fully-connected network of 1024 neurons,based on the biologically plausible Izhikevich spiking model,can be simulated at 100 times real-time speed. The simulator is based on a re-usable interconnection architecture for storing synapse weights and calculating thalamic input, which makes use of the large number of available block-RAMs and huge amounts of fine-grain parallelism. The simulator achieves a sustained throughput of 2.26 GFlops in double-precision, and a single Virtex-5 xc5vlx330t without off-chip storage running at 133 MHz is 16 times faster than a 3 GHz Core2 CPU, and 1.1 times faster than a single-precision 1.2 GHz 30-core GPU.
Keywords :
field programmable gate arrays; neural nets; random-access storage; FPGA accelerated simulation; Izhikevich spiking model; artificial neural networks; biologically plausible spiking neural networks; block-RAM; dedicated hardware solutions; fine-grain parallelism; fully-connected network; model complexity; re-usable interconnection architecture; synapse weights; thalamic inputs; Acceleration; Artificial intelligence; Artificial neural networks; Biological neural networks; Biological system modeling; Field programmable gate arrays; Intelligent networks; Neural network hardware; Neural networks; Throughput; FPGA; spiking neural networks;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Custom Computing Machines, 2009. FCCM '09. 17th IEEE Symposium on
Conference_Location :
Napa, CA
Print_ISBN :
978-0-7695-3716-0
Type :
conf
DOI :
10.1109/FCCM.2009.46
Filename :
5290953
Link To Document :
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