Title :
A quarter-micron planarized interconnection technology with self-aligned plug
Author :
Ueno, K. ; Ohto, K. ; Tsunenari, K. ; Kajiyana, K. ; Kikuta, K. ; Kikkawa, T.
Author_Institution :
Microelectron. Res. Labs., NEC Corp., Japan
Abstract :
In order to realize minimum pitch interconnections without degrading reliability, self-aligned contacts (SACs) between interconnections and plugs are necessary. The planarized interconnections with SAC plugs is formed for quarter-micron size as follows. Interconnection trenches and contact holes are formed using a self-aligned etch-stop layer, followed by simultaneous metal-filling into the trenches and contact holes. Si-rich oxide (SRO) films are found to be promising for a self-aligned etch-stop layer with their high etching selectivity to SiO/sub 2/ as high as 10-30. Sufficiently low line resistance of 15 k Omega /cm and low contact resistance of 70 Omega /contact are obtained with the quarter-micron W-interconnection with the SAC plugs.<>
Keywords :
VLSI; circuit reliability; contact resistance; etching; integrated circuit technology; metallisation; tungsten; 0.25 micron; SAC plugs; ULSI; W; W-interconnection; contact holes; contact resistance; etch-stop layer; etching selectivity; interconnection trenches; line resistance; metal-filling; minimum pitch interconnections; quarter-micron planarized interconnection; reliability; self-aligned contacts; self-aligned plug; Circuit reliability; Contact resistance; Etching; Integrated circuit fabrication; Metallization; Tungsten; Very-large-scale integration;
Conference_Titel :
Electron Devices Meeting, 1992. IEDM '92. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-0817-4
DOI :
10.1109/IEDM.1992.307366
