DocumentCode :
1952750
Title :
Should yield be a design objective?
Author :
Koren, Israel
Author_Institution :
Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
fYear :
2000
fDate :
2000
Firstpage :
115
Lastpage :
120
Abstract :
The objectives of good chip design have traditionally included issues like performance, power and reliability. Yield is rarely considered during the design process, except in the design of memory ICs, where specific defect-tolerance techniques are incorporated into the architecture for yield enhancement. In order to make the case for establishing yield as another design objective we must first prove that a chip´s yield cannot only be affected, but consistently improved, by decisions made during the design process
Keywords :
VLSI; integrated circuit design; integrated circuit layout; integrated circuit yield; network routing; VLSI design process; chip design; chip yield; floorplanning; placement impact; routing impact; Chip scale packaging; Process design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Quality Electronic Design, 2000. ISQED 2000. Proceedings. IEEE 2000 First International Symposium on
Conference_Location :
San Jose, CA
Print_ISBN :
0-7695-0525-2
Type :
conf
DOI :
10.1109/ISQED.2000.838863
Filename :
838863
Link To Document :
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