DocumentCode
1952915
Title
Partitioning DSP Applications on a Multi-core Architecture Based on Load Balancing
Author
Tadic, Marija ; Kovacevic, Jelena
Author_Institution
Fac. of Tech. Sci., Univ. of Novi Sad, Novi Sad, Serbia
fYear
2009
fDate
7-8 Sept. 2009
Firstpage
154
Lastpage
155
Abstract
In this paper, we describe the technique for optimization of demanding DSP applications on a dual core DSP-s. In addition to common techniques of optimization, we use the Advanced Multi-core Optimization Technique, resolving load balancing problem. The methodology of the proposed technique is based on the application partitioning on two cores, assuming algorithm and processor architecture understanding. To verify the described technique we used one class of lossless audio decoder on CS4953xx dual core processor.
Keywords
decoding; digital signal processing chips; optimisation; processor scheduling; resource allocation; DSP application partitioning; advanced multicore optimization technique; load balancing problem; lossless audio decoder; multicore architecture; Application software; Assembly; Codecs; Computer architecture; Decoding; Digital signal processing; Hardware; Load management; MATLAB; Partitioning algorithms; DSP; load balancing; optimization;
fLanguage
English
Publisher
ieee
Conference_Titel
Engineering of Computer Based Systems, 2009. ECBS-EERC '09. First IEEE Eastern European Conference on the
Conference_Location
Novi Sad
Print_ISBN
978-1-4244-4677-3
Electronic_ISBN
978-0-7695-3759-7
Type
conf
DOI
10.1109/ECBS-EERC.2009.24
Filename
5290972
Link To Document