• DocumentCode
    1953133
  • Title

    FPGA platforms leading the way in the application of ‘more than Moore´s’ technology

  • Author

    Bolsens, Ivo

  • Author_Institution
    Xilinx, USA
  • fYear
    2010
  • fDate
    8-10 Dec. 2010
  • Abstract
    Summary form only given: Modern FPGA platforms have capabilities that are well suited to assume a more central role in the implementation of complex embedded processing systems. The aggressive adoption of Moore´s Law and the application of emerging 3D stacked silicon interconnect technology have resulted in the growth of FPGA capacity that outperforms Moore´s Law. In particular, FPGAs are well placed to be at the heart of complex signal processing, packet processing and high performance computing applications because of their high computational efficiency matched by high bandwidth concurrent memory access and rich on-chip interconnectivity, all of this combined with complete programmability and best in industry power efficiency. The key to unleashing the full horsepower of FPGA platforms to the system designer is, first of all, a hardware platform that allows tight integration between the processor, the programmable logic and the memory. Second, the hardware architecture has to be supported by a programming flow that abstracts the hardware implementation details and provides seamless and efficient mapping of system functions on multiple processor cores and programmable hardware functions. Finally, a programmable infrastructure has to be provided that targets specific requirements for packet processing or signal processing or high performance computing.
  • Keywords
    elemental semiconductors; field programmable gate arrays; integrated circuit interconnections; logic circuits; silicon; 3D stacked silicon interconnect technology; FPGA capacity; FPGA platform full horsepower; FPGA platforms; Moore law; Moore technology; complex embedded processing systems; complex signal processing; hardware architecture; hardware implementation; hardware platform; high bandwidth concurrent memory access; high computational efficiency; multiple processor cores; packet processing; programmable hardware functions; programmable infrastructure; programmable logic; rich on-chip interconnectivity;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Technology (FPT), 2010 International Conference on
  • Conference_Location
    Beijing
  • Print_ISBN
    978-1-4244-8980-0
  • Type

    conf

  • DOI
    10.1109/FPT.2010.5681476
  • Filename
    5681476