DocumentCode :
1953213
Title :
Low-overhead asynchronous RISC microprocessor - a design experiment
Author :
Lao, Xiangzhuan ; Saadallah, Nisrine ; Zhu, Tao ; Kong, Xiaohua ; Negulescu, Radu
Author_Institution :
Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, Que., Canada
fYear :
2004
fDate :
20-23 June 2004
Firstpage :
377
Lastpage :
380
Abstract :
This paper presents a design of the low-control-overhead asynchronous microprocessor. This is an experiment on exploring the benefits of asynchronous microprocessor design for high-speed, low power embedded systems. The paper reports the design approach, implementation and performance, including a comparison with the synchronous version of the microprocessor. In this paper, we report on an experiment on asynchronous processor design using GasP circuits.
Keywords :
asynchronous circuits; embedded systems; high-speed integrated circuits; integrated circuit design; logic design; low-power electronics; microprocessor chips; reduced instruction set computing; GasP circuits; asynchronous RISC microprocessor; high speed embedded systems; logic design; low control overhead microprocessor design; low power embedded systems; Circuits; Clocks; Decoding; Embedded system; Metastasis; Microprocessors; Power engineering computing; Reduced instruction set computing; Registers; Sampling methods;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2004. NEWCAS 2004. The 2nd Annual IEEE Northeast Workshop on
Print_ISBN :
0-7803-8322-2
Type :
conf
DOI :
10.1109/NEWCAS.2004.1359112
Filename :
1359112
Link To Document :
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