DocumentCode
1953247
Title
A tool for automatic watermarking of IP designs
Author
Abdel-Hamid, Amr T. ; Tahar, Sofiène ; Aboulhamid, El Mostapha
Author_Institution
Dept. of Electr. & Comput. Eng., Concordia Univ., Montreal, Que., Canada
fYear
2004
fDate
20-23 June 2004
Firstpage
381
Lastpage
384
Abstract
Intellectual property (IP) block reuse is essential for facilitating the design process of system-on-a-chip (SOC). Sharing IP blocks in such a competitive market poses significant high security risks. Digital watermarking, used with most of the shared digital media, has emerged as a candidate solution for helping copyright protection of IP blocks. In this paper, we present an automatic tool for watermarking sequential IP designs. The tool is based on the idea of utilizing unused transitions in the state transition graph (STG) to add a part of the watermark. The tool also tries to create a supraliminal channel by utilizing the already existing transitions. The paper describes the structure of the tool, overviews the algorithms used in its components, and reports experimental results obtained by applying it on a set of benchmarks.
Keywords
directed graphs; industrial property; integrated circuit design; system-on-chip; watermarking; IP block reuse; SOC; automatic watermarking; copyright protection; digital media; digital watermarking; intellectual property block reuse; sequential IP design; state transition graph; supraliminal channel; system-on-a-chip; Circuits; Copyright protection; Fingerprint recognition; Intellectual property; Law; Legal factors; Licenses; Process design; System-on-a-chip; Watermarking;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. NEWCAS 2004. The 2nd Annual IEEE Northeast Workshop on
Print_ISBN
0-7803-8322-2
Type
conf
DOI
10.1109/NEWCAS.2004.1359114
Filename
1359114
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