Title :
Wafer level system packaging and integration for solid state lighting (SSL)
Author_Institution :
Dept. of Mech. Eng., Lamar Univ., Beaumont, TX, USA
Abstract :
In this paper, wafer level system packaging and integration for solid state lighting (SSL) is presented, which includes wafer level phosphor coating, wafer level LED chip encapsulation, wafer level optics manufacturing, reconfiguration (or reconstitution) of LED/silicon wafers, through silicon vias (TSV) formations between LED and silicon/ceramics/polymer wafers, wafer-to-wafer or wafer-to-chip bonding and stacking, and wafer level bumping technologies. A variety of wafer level bumping technologies is introduced, such as ball on I/O (BON), ball on polymer (BOP), redistribution dielectric layer (RDL) process, and copper post bumping process. The reliability improvement among different bumping technologies and the implications in SSL systems are discussed.
Keywords :
ceramics; elemental semiconductors; encapsulation; light emitting diodes; phosphors; polymers; reliability; silicon; three-dimensional integrated circuits; wafer bonding; wafer level packaging; Si; ball on I/O; ball on polymer; redistribution dielectric layer; reliability; silicon/ceramics/polymer wafers; solid state lighting; stacking; through silicon vias; wafer level LED chip encapsulation; wafer level bumping; wafer level optics manufacturing; wafer level phosphor coating; wafer level system packaging; wafer-to-chip bonding; wafer-to-wafer bonding; Integrated circuits; Light emitting diodes; Nickel; Polymers; Semiconductor device reliability; Silicon;
Conference_Titel :
Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE), 2012 13th International Conference on
Conference_Location :
Cascais
Print_ISBN :
978-1-4673-1512-8
DOI :
10.1109/ESimE.2012.6191771