• DocumentCode
    1953510
  • Title

    Applying the OpenMORE assessment program for IP cores

  • Author

    Guéguen, Jean-Pierre ; Bricaud, Pierre

  • fYear
    2000
  • fDate
    2000
  • Firstpage
    379
  • Lastpage
    381
  • Abstract
    Synopsys and Mentor Graphics have announced a new extended OpenMORE hard IP section version 1.0, including added measurability criteria for design and verification of hard cores, and incorporating key hard deliverables specifications from the VSIA industry group. OpenMORE provides the industry´s premier methodology to simply and quickly evaluate the reusability of soft and hard IP cores for SoC design. OpenMORE structures the assessment of the reuse quality of IP cores. IP developers enter assessment data into the worksheet following approximately 150 rules and guidelines for soft cores and about 100 rules and guidelines for hard cores. Rules are assigned 5 points and guidelines are assigned 1 point. There are three categories used for the grading process; Macro Design Guidelines, Verification Guidelines, and Deliverable Guidelines
  • Keywords
    VLSI; application specific integrated circuits; circuit CAD; formal verification; industrial property; integrated circuit design; Mentor Graphics; OpenMORE assessment program; SoC design; Synopsys; VSIA industry group; assessment data; deliverable guidelines; hard IP cores; macro design guidelines; measurability criteria; soft IP cores; verification guidelines; Graphics; Guidelines; Intellectual property; Law; Legal factors; Marketing management; Production facilities; Productivity; System-on-a-chip; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Quality Electronic Design, 2000. ISQED 2000. Proceedings. IEEE 2000 First International Symposium on
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    0-7695-0525-2
  • Type

    conf

  • DOI
    10.1109/ISQED.2000.838900
  • Filename
    838900