Obstacle-free two-dimensional online-routing for run-time reconfigurable FPGA-based systems

By neatly reserving routing resources of an FPGA at design-time, a circuit switching network can be implemented for integrating reconfigurable modules in a two-dimensional manner at run-time. In this network, paths can be set directly by manipulating fractions of the switch matrix configuration. By utilizing disjoint resources for implementing the network and the modules of the system, the network is capable to route paths to partial modules independent of the present module placement layout. This paper proposes concepts, implementation issues, and a design flow for building reconfigurable systems providing such a network. Furthermore, a timing model will be presented for validating the system at run-time. The applicability of the network will be demonstrated in a prototype system by routing I/O pins to partial modules.