Evaluation of the effects of the layout design on the quality of surface mount boards

This paper presents part of the results obtained after conducting an experiment designed with the help of the Design of Experiments (DoE) method. The aim of this experiment is to evaluate the dependencies between the layout design and the production quality of surface mount (SMT) boards. A test board was specially designed to allow us to vary certain factors. The DoE method was used to plan the variation of these factors in order to see their influences on the responses. The responses analyzed until now are: number of tombstones, wetting area, stand-off and existence of solder balls. The test was performed with 108 boards, two stencils, three solder pastes and three thermal profiles. Preliminary results show very few tombstones and good wetting areas for all three solder pastes in case of convection reflow. The heights for all components were measured before and after soldering. The analysis of the values obtained for the same chip component reveals that the stand-off difference (as we defined it) has the smallest value when the pad width is smaller than standard. Thus, the influence of the layout design on the quality of SMT boards can be observed.