DocumentCode
1953713
Title
Reducing power consumption of CMOS VLSI´s through VDD and VTH control
Author
Sakurai, Takayasu
Author_Institution
Center for Collaborative Res., Tokyo Univ., Japan
fYear
2000
fDate
2000
Firstpage
417
Lastpage
423
Abstract
Lowering operating voltage, VDD, is a key to low-power CMOS digital VLSIs. In order to complete a certain task in a required time and in order to keep leakage current within a tolerable level in the low VDD designs, VDD and VTH control is obligatory. This paper covers several of the schemes including multi-VTH, variable VTH, multi-VDD and variable VDD to achieve low-power systems. Circuit level ideas for software related research are described
Keywords
CMOS digital integrated circuits; VLSI; integrated circuit design; low-power electronics; CMOS VLSI; leakage current; low-power CMOS digital ICs; operating voltage control; power consumption reduction; threshold voltage control; Energy consumption; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Quality Electronic Design, 2000. ISQED 2000. Proceedings. IEEE 2000 First International Symposium on
Conference_Location
San Jose, CA
Print_ISBN
0-7695-0525-2
Type
conf
DOI
10.1109/ISQED.2000.838910
Filename
838910
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