Title :
Comparison of current flash EEPROM erasing methods: stability and how to control
Author :
Yoshikawa, K. ; Yamada, S. ; Miyamoto, Jun ; Suzuki, T. ; Oshikiri, M. ; Obi, E. ; Hiura, Y. ; Yamada, K. ; Ohshima, Y. ; Atsumi, S.
Author_Institution :
Semicond. Device Eng. Lab., Toshiba Corp., Kawasaki, Japan
Abstract :
The effects of process and device parameter fluctuations of flash EEPROM cells on the flash-erasing instabilities are systematically investigated using a simple analytical model and numerical simulation. Among various erase methods, the High voltage Source with grounded Erase (HSE) method is the most stable scheme for the control of erasing speed and erased threshold voltage distribution. The stability of HSE is caused by the reduced electric field fluctuations associated with cell parameter variations, due to the source bias effect, especially at the final stage of erasing. It is also found that the recently proposed self-convergence scheme is an effective tool for suppressing the erased-V/sub t/ distribution width, and that negative gate erase designs equipped with this method will be a powerful vehicle for the next generation scaled flash devices.<>
Keywords :
EPROM; semiconductor device models; simulation; stability; voltage distribution; HV source with grounded erase method; analytical model; cell parameter variations; device parameter fluctuations; electric field fluctuations; flash EEPROM erasing methods; flash-erasing instabilities; negative gate erase designs; numerical simulation; process parameter fluctuations; self-convergence scheme; source bias effect; stability; threshold voltage distribution; EPROM; Semiconductor device modeling; Simulation; Stability;
Conference_Titel :
Electron Devices Meeting, 1992. IEDM '92. Technical Digest., International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-0817-4
DOI :
10.1109/IEDM.1992.307431