• DocumentCode
    1954161
  • Title

    Thermo-mechanical sub-modelling of BGA components in PCB reflow

  • Author

    Stoyanov, Stanimir ; Dabek, Alexander ; Bailey, Christopher

  • Author_Institution
    CMRG, Univ. of Greenwich, London, UK
  • fYear
    2013
  • fDate
    8-12 May 2013
  • Firstpage
    253
  • Lastpage
    258
  • Abstract
    This paper details a sub-modelling approach to the thermo-mechanical characterisation of flip-chip Ball Grid Array (fcBGA) behaviour during PCB reflow assembly. The main advances in the outlined modelling methodology relate to: (1) accurate assessment of PCB material properties through image processing of the PCB Gerbers, (2) adoption of mesh element “birth” and “dead” technology to capture accurately the real interaction between the BGA and the PCB during reflow, and (3) detailed analysis of the mechanical behaviour of copper structures in the BGA substrate under the reflow thermal loads. The focus in the study is on the warpage behaviour of the package during PCB reflow assembly, the behaviour of 2nd level solder joints, and on the evaluation of the stress response of internal BGA substrate structures such as macro vias and copper paths in and through substrate dielectric layers. Principal conclusion from this study is that the BGA warpage is significantly reduced as a result of the assembly formation with the PCB but reflow causes partial yielding of the substrate copper structure. The modelling study identified the BGA locations that are most susceptible to damage. Stress levels and damage parameters are obtained for package materials and at material interfaces, and these can be compared with known failure limits.
  • Keywords
    assembling; ball grid arrays; dielectric materials; flip-chip devices; printed circuit design; reflow soldering; solders; stress effects; substrates; thermomechanical treatment; 2nd level solder joints; BGA components; BGA warpage; PCB Gerbers; PCB material properties assessment; PCB reflow assembly; assembly formation; copper paths; damage parameters; fcBGA behaviour; flip-chip ball grid array; image processing; internal BGA substrate structures; macrovias; material interfaces; mechanical behaviour; mesh element birth and dead technology; package materials; reflow thermal loads; stress levels; stress response; substrate copper structure; substrate dielectric layers; thermo-mechanical submodelling; thermomechanical characterisation; warpage behaviour; Copper; Load modeling; Semiconductor device modeling; Soldering; Stress; Substrates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Technology (ISSE), 2013 36th International Spring Seminar on
  • Conference_Location
    Alba Iulia
  • ISSN
    2161-2528
  • Type

    conf

  • DOI
    10.1109/ISSE.2013.6648252
  • Filename
    6648252