Title :
An efficient algorithm to partition the combinational circuits for pseudoexhaustive testing
Author :
El-Mahlawy, Mohamed H. ; Waller, Winston
Author_Institution :
Electron. Eng. Labs., Kent Univ., Canterbury, UK
Abstract :
We have presented an efficient algorithm to partition the combinational circuits for built-in pseudoexhaustive self-testing of VLSI circuits. The partitioning procedure is based on several heuristics that enable the procedure to overcome the unexpected results of the greedy heuristic procedure
Keywords :
VLSI; automatic testing; combinational circuits; integrated circuit testing; logic testing; VLSI circuits; combinational circuits partitioning; efficient algorithm; greedy heuristic procedure; heuristics; partitioning procedure; pseudoexhaustive self-testing; pseudoexhaustive testing; Built-in self-test; Circuit faults; Circuit simulation; Circuit testing; Combinational circuits; Electrical fault detection; Fault detection; Feedback; Partitioning algorithms; Very large scale integration;
Conference_Titel :
Radio Science Conference, 2000. 17th NRSC '2000. Seventeenth National
Conference_Location :
Minufiya
Print_ISBN :
977-5031-64-8
DOI :
10.1109/NRSC.2000.838953
