Conductance Modulation Techniques in Switched-Capacitor DC-DC Converter for Maximum-Efficiency Tracking and Ripple Mitigation in 22 nm Tri-Gate CMOS

Switch conductance modulation techniques are demonstrated in a fully integrated multi-ratio switched-capacitor voltage regulator with hysteretic control, in 22 nm tri-gate CMOS with high-density MIM capacitor. We present (i) an adaptive switch-size scaling scheme for maximum efficiency tracking across a wide range of voltages and currents, governed by a frequency-based control law that is experimentally validated across multiple dies and temperatures and, (ii) a simple active ripple mitigation technique that modulates the gate drive of select MOSFET switches effectively in all conversion modes. Efficiency improvements up to 15% are measured under low output voltage and load conditions. Load-independent output ripple of <;50 mV is achieved, enabling reduced interleaving. Test chip implementations and measurements demonstrate ease of integration in SoC designs, power efficiency benefits and EMI/RFI improvements.