DocumentCode :
1954867
Title :
Architecture for adders in digital filters operating in mixed power modes
Author :
Ionescu, Valeriu ; Lita, I. ; Visan, Daniel ; Cioc, Bogdan
Author_Institution :
Electron., Comput. & Electr. Eng. Dept., Univ. of Pitesti, Pitesti, Romania
fYear :
2013
fDate :
8-12 May 2013
Firstpage :
397
Lastpage :
400
Abstract :
The push for mobility in all areas of information technology brings the need to develop systems that perform their functions even if they have limited access to power sources (batteries, solar panels, etc.). The same systems however are expected to improve their performance significantly when the power requirements are no longer a problem. This paper proposes an adder architecture for use in digital filters that operates in environments with different power requirements, based parallel prefix adders.
Keywords :
adders; digital filters; adder architecture; digital filters; information technology; mixed power modes; parallel prefix adders; Adders; Computer architecture; Digital filters; Field programmable gate arrays; Microprocessors; Power demand; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Technology (ISSE), 2013 36th International Spring Seminar on
Conference_Location :
Alba Iulia
ISSN :
2161-2528
Type :
conf
DOI :
10.1109/ISSE.2013.6648280
Filename :
6648280
Link To Document :
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