DocumentCode :
1957275
Title :
A reconfigurable decision-feedback equalizer chip set architecture for high bit-rate QAM digital modems
Author :
Lu, Fang ; Samueli, Henry
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
fYear :
1991
fDate :
14-17 Apr 1991
Firstpage :
1185
Abstract :
A 70-MHz decision-feedback equalizer chip set using novel architecture and circuit design techniques that can accommodate a wide variety of modulation formats (QPSK, 16-, 64-, 256-QAM) is proposed. The equalizer is configurable into either a symbol-spaced or fractionally spaced structure. The CMOS chips are full cascadable to implement longer filter lengths without any speed degradation, and the coefficient updating circuitry for implementing the LMS algorithm is included on-chip
Keywords :
CMOS integrated circuits; amplitude modulation; digital radio systems; equalisers; feedback; modems; phase shift keying; 16 QAM; 256-QAM; 64-QAM; 70 MHz; CMOS technology; LMS algorithm; QPSK; VHF; circuit design; coefficient updating circuitry; decision-feedback equalizer chip; digital modems; digital radio; filter lengths; fractionally spaced structure; high bit-rate; modulation formats; reconfigurable architecture; Circuits; Decision feedback equalizers; Quadrature amplitude modulation; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, 1991. ICASSP-91., 1991 International Conference on
Conference_Location :
Toronto, Ont.
ISSN :
1520-6149
Print_ISBN :
0-7803-0003-3
Type :
conf
DOI :
10.1109/ICASSP.1991.150591
Filename :
150591
Link To Document :
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