DocumentCode
1957726
Title
Architecting graphics processors for non-graphics compute acceleration
Author
Aamodt, Tor M.
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of British Columbia, Vancouver, BC, Canada
fYear
2009
fDate
23-26 Aug. 2009
Firstpage
963
Lastpage
968
Abstract
This paper discusses the emergence of graphics processing units (GPUs) that contain architecture features for accelerating non-graphics (or GPGPU) applications. It provides an introduction for those interested in undertaking research at the intersection of manycore computing and GPU architecture. First, the motivation for using GPUs for non-graphics processing rather than developing specialized hardware is outlined. Then, the features of GPU architectures and related programming models for non-graphics computing on GPUs are briefly described. Finally, some recent research and architecture challenges related to accelerating non-graphics workloads on GPUs are summarized.
Keywords
coprocessors; GPU architecture; graphics processing unit; graphics processor; manycore computing; nongraphics application; nongraphics compute acceleration; nongraphics computing; nongraphics processing; Acceleration; Application software; Computer architecture; Computer graphics; Costs; Hardware; Multicore processing; Parallel processing; Pipelines; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Computers and Signal Processing, 2009. PacRim 2009. IEEE Pacific Rim Conference on
Conference_Location
Victoria, BC
Print_ISBN
978-1-4244-4560-8
Electronic_ISBN
978-1-4244-4561-5
Type
conf
DOI
10.1109/PACRIM.2009.5291239
Filename
5291239
Link To Document