Title :
Instruction generation for hybrid reconfigurable systems
Author :
Kastner, R. ; Ogrenci-Memik, S. ; Bozorgzadeh, E. ; Sarrafzadeh, M.
Author_Institution :
Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA
Abstract :
We present an algorithm for simultaneous template generation and matching. The algorithm profiles the graph and iteratively contracts edges to create the templates. The algorithm is general and can be applied to any type of graph, including directed graphs and hypergraphs. We discuss how to target the algorithm towards the novel problem of instruction generation and selection for a hybrid (re)configurable systems. In particular, we target the strategically programmable system, which embeds complex computational units like ALUs, IP blocks, etc. into a configurable fabric. We argue that an essential compilation step for these systems is instruction generation, as it is needed to specify the functionality of the embedded computational units. Additionally, instruction generation can be used to create soft macros tightly sequenced pre-specified operations placed in the configurable fabric.
Keywords :
VLSI; application specific integrated circuits; directed graphs; field programmable gate arrays; integrated circuit design; logic CAD; logic partitioning; reconfigurable architectures; FPGA; compilation step; complex computational units; configurable fabric; directed graphs; edges; hybrid reconfigurable systems; hypergraphs; instruction generation; iterative contracting; logic synthesis; partitioning; pre-specified operations; soft macros; strategically programmable system; template generation; template matching; Circuits; Computer aided instruction; Computer science; Contracts; Embedded computing; Fabrics; Finite impulse response filter; Hybrid power systems; Iterative algorithms; Logic;
Conference_Titel :
Computer Aided Design, 2001. ICCAD 2001. IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
0-7803-7247-6
DOI :
10.1109/ICCAD.2001.968608
