Buried oxide densification for low power, low voltage CMOS applications [SIMOX]

Summary form only given. A significant aspect with regard to SIMOX wafers for low voltage, low power applications is the reliability and performance of the thin buried oxide. In addition, when subjected to high total dose irradiation, the silicon islands within the BOX layer of SIMOX can store charges and significantly affect the back channel threshold voltages of devices. Thus, elimination of the islands within the buried oxide (BOX) layer is preferred in order to prevent leakage through these conductive islands and charge build-up within the buried oxide layer. A differential (2-step) ramp rate as applied to full and 100 nm BOX SIMOX was previously reported to play a significant role in the stoichiometry and island formation within the buried layer (Sudou et al., 1996). This paper focuses on the properties of a thin (120 nm) buried oxide as a function of the anneal ramp rate and the anneal temperature. In this research, we have found an improvement in the buried oxide stoichiometry with the use of a slower, singular ramp rate for specified thin buried oxides, with slower ramp rates and higher anneal temperatures suggested for reduction of the presence of Si islands within the BOX layer.