DocumentCode :
1958721
Title :
Novel parity-check code and post-processor for perpendicular recording channels
Author :
Elidrissi, Moulay Rachid ; Mathew, George
Author_Institution :
Dept. of ECE, Nat. Univ. of Singapore
fYear :
2004
fDate :
7-7 Sept. 2004
Firstpage :
495
Lastpage :
499
Abstract :
A novel constrained parity-check code with post-processing is presented in this paper for improving the bit error rate performance on perpendicular recording channels. The particular design of the parity-check code results in a post-processor, that is computationally much simpler than conventional post-processors. We also examine the optimality of the post-processors used in current systems. The proposed constrained parity-check code results in about 4.2 dB coding gain, as seen from our analytical and simulation studies
Keywords :
error statistics; parity check codes; telecommunication channels; bit error rate; parity-check code; perpendicular recording channel; post-processor; Detectors; Error correction codes; Event detection; Maximum likelihood detection; Memory; Modulation coding; Paramagnetic materials; Parity check codes; Perpendicular magnetic recording; Tiles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications Systems, 2004. ICCS 2004. The Ninth International Conference on
Conference_Location :
Singapore, China
Print_ISBN :
0-7803-8549-7
Type :
conf
DOI :
10.1109/ICCS.2004.1359426
Filename :
1359426
Link To Document :
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