DocumentCode
1958784
Title
Reliability of 4H-SiC DMOSFETs Evaluated by Bias Stressing
Author
Okayama, T. ; Arthur, S.D. ; Garrett, J.L. ; Rao, M.V.
Author_Institution
George Mason Univ., Fairfax
fYear
2007
fDate
18-20 June 2007
Firstpage
121
Lastpage
122
Abstract
In this work, the threshold voltage (VTH) of n-channel 4H-SiC double-implanted metal-oxide- semiconductor field effect transistors (DMOSFETs) was measured after different gate-bias-stress durations to determine if the bias-stress induces a shift in the VTH.
Keywords
MOSFET; semiconductor device reliability; silicon compounds; wide band gap semiconductors; DMOSFET; SiC; bias stress induced instability; semiconductor device reliability; transfer curves; Double-gate FETs; Electric variables measurement; Electron traps; Intrusion detection; Semiconductor device reliability; Silicon carbide; Stress measurement; Temperature distribution; Threshold voltage; Velocity measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Device Research Conference, 2007 65th Annual
Conference_Location
Notre Dame, IN
ISSN
1548-3770
Print_ISBN
978-1-4244-1101-6
Electronic_ISBN
1548-3770
Type
conf
DOI
10.1109/DRC.2007.4373679
Filename
4373679
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