DocumentCode :
1959185
Title :
Minimum-buffered routing of non-critical nets for slew rate and reliability control
Author :
Alpert, C. ; Kahng, A.B. ; Bao Liu ; Mandoiu, I. ; Zelikovsky, A.
Author_Institution :
Dept. of Comput. Sci. & Eng., California Univ., San Diego, La Jolla, CA, USA
fYear :
2001
fDate :
4-8 Nov. 2001
Firstpage :
408
Lastpage :
415
Abstract :
In high-speed digital VLSI design, bounding the load capacitance at gate outputs is a well-known methodology to improve coupling noise immunity, reduce degradation of signal transition edges, and reduce delay uncertainty due to coupling noise. Bounding load capacitance also improves reliability with respect to hot-carrier oxide breakdown and AC self-heating in interconnects, and guarantees bounded input rise/fall times at buffers and sinks. This paper introduces a new minimum-buffer routing problem (MBRP) formulation which requires that the capacitive load of each buffer, and of the source driver, be upper-bounded by a given constant. Our contributions include the following. (i) We give linear-time algorithms for optimal buffering of a given routing tree with a single (inverting or noninverting) buffer type. (ii) For simultaneous routing and buffering with a single noninverting buffer type, we give a factor 2(1+/spl epsiv/) approximation algorithm and prove that no algorithm can guarantee a factor smaller than 2 unless P=NP. For the case of a single inverting buffer type, we give a factor 4(1+/spl epsiv/) approximation algorithm. (iii) We give local-improvement and clustering based MBRP heuristics with improved practical performance, and present a comprehensive experimental study comparing the runtime/quality trade-offs of the proposed MBRP heuristics on test cases extracted from recent industrial designs.
Keywords :
VLSI; buffer circuits; capacitance; dielectric thin films; digital integrated circuits; high-speed integrated circuits; hot carriers; integrated circuit design; integrated circuit interconnections; integrated circuit noise; integrated circuit reliability; network routing; AC self-heating; MBRP formulation; MBRP heuristics; approximation algorithm; bounded input rise/fall times; buffer capacitive load; buffering; buffers; clustering based MBRP heuristics; coupling noise; coupling noise immunity; delay uncertainty; gate outputs; high-speed digital VLSI design; hot-carrier oxide breakdown; interconnects; inverting buffer type; linear-time algorithms; load capacitance bounding; local-improvement based MBRP heuristics; minimum-buffer routing problem formulation; minimum-buffered routing; noncritical nets; noninverting buffer type; optimal buffering; reliability; reliability control; routing; routing tree; runtime/quality trade-offs; signal transition edges; sinks; slew rate control; source driver capacitive load; Approximation algorithms; Capacitance; Clustering algorithms; Degradation; Delay; Noise reduction; Routing; Signal design; Uncertainty; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Aided Design, 2001. ICCAD 2001. IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
ISSN :
1092-3152
Print_ISBN :
0-7803-7247-6
Type :
conf
DOI :
10.1109/ICCAD.2001.968659
Filename :
968659
Link To Document :
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