Title :
The partitioning problem on VLSI arrays: I/O and local memory complexity
Author :
Burleson, Wayne P.
Author_Institution :
Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
Abstract :
The space/time costs of implementing the nonlocal communication of partitioned algorithms are studied. In addition, the author looks at the often-neglected issue of I/O complexity for partitioned algorithms. He illustrates the design method and tradeoffs with an example in DSP, the fixed-point multiply-accumulator (MAC)
Keywords :
VLSI; computational complexity; computerised signal processing; parallel algorithms; DSP; I/O complexity; VLSI arrays; digital signal processing; fixed-point multiply-accumulator; local memory complexity; nonlocal communication; partitioned algorithms; space/time costs; Computer architecture; Costs; Digital signal processing; Partitioning algorithms; Processor scheduling; Signal design; Signal mapping; Signal processing algorithms; Vectors; Very large scale integration;
Conference_Titel :
Acoustics, Speech, and Signal Processing, 1991. ICASSP-91., 1991 International Conference on
Conference_Location :
Toronto, Ont.
Print_ISBN :
0-7803-0003-3
DOI :
10.1109/ICASSP.1991.150610
