Abstract :
Thin film SOI substrates are very attractive for low power applications due to the lower subthreshold swing, higher switching speed, lower power consumption and higher degree of integration as compared to bulk circuits. Also, due to the total dielectric isolation, SOI transistors show no latch-up effect and lower leakage currents, and the latter also makes them very attractive for smart power applications. Smart power devices are, for example, DMOS transistors or IGBTs that are controlled by standard MOS circuits. For high currents, these power devices are often built as vertical devices. At the Fraunhofer Institute, local SIMOX wafers are used for smart power applications to isolate the low-voltage part from the power part of the circuit dielectrically instead of the normal junction isolation (Vogt et al., 1993). In this work, a structural comparison is made between local SIMOX substrates produced by four different methods. The samples were prepared (1) by local oxygen implantation, (2) by a LOCOS process followed by wet chemical removal of the oxide, (3) by dry etching of the silicon film and the BOX, and (4) by wet chemical etching of the silicon film and the BOX. The samples were examined by SEM and TEM analysis, AFM measurements and defect etching.
Keywords :
MOS integrated circuits; SIMOX; atomic force microscopy; buried layers; etching; integrated circuit measurement; interface structure; ion implantation; oxidation; power integrated circuits; scanning electron microscopy; surface structure; transmission electron microscopy; AFM measurements; BOX; DMOS transistors; IGBTs; LOCOS process; SEM; SOI transistors; Si-SiO/sub 2/; TEM; buried oxide; circuit integration; defect etching; dielectric isolation; dry etching; junction isolation; latch-up-effect; leakage currents; local SIMOX substrates; local SIMOX wafers; local oxygen implantation; low-voltage circuit isolation; power consumption; power devices; silicon film; smart power applications; smart power devices; standard MOS circuits; structural characterization; subthreshold swing; switching speed; thin film SOI substrates; vertical devices; wet chemical etching; wet chemical oxide removal; Chemical processes; Dielectric substrates; Dielectric thin films; Dry etching; Energy consumption; Leakage current; Semiconductor films; Silicon; Switching circuits; Thin film circuits;