Title :
Adaptive reconfigurable voting for enhanced reliability in medium-grained fault tolerant architectures
Author :
Veljkovic, Filip ; Riesgo, Teresa ; de la Torre, Eduardo
Author_Institution :
Center of Ind. Electron. - CEI, Univ. Politec. de Madrid, Madrid, Spain
Abstract :
The impact of SRAM-based FPGAs is constantly growing in aerospace industry despite the fact that their volatile configuration memory is highly susceptible to radiation effects. Therefore, strong fault-handling mechanisms have to be developed in order to protect the design and make it capable of fighting against both soft and permanent errors. In this paper, a fully reconfigurable medium-grained triple modular redundancy (TMR) architecture which forms part of a runtime adaptive on-board processor (OBP) is presented. Fault mitigation is extended to the voting mechanism by applying our reconfiguration methodology not only to domain replicas but also to the voter itself. The proposed approach takes advantage of adaptive configuration placement and modular property of the OBP, thus allowing on-line creation of different medium-grained TMRs and selection of their granularity level. Consequently, we are able to narrow down the fault-affected area thus making the error recovery process faster and less power consuming. The conventional hardware based voting is supported by the ICAP-based one in order to additionally strengthen the reconfigurable intermediate voting. In addition, the implementation methodology ensures using only one memory footprint for all voters and their voting adaptations thus saving storing resources in expensive rad-hard memories.
Keywords :
fault tolerant computing; field programmable gate arrays; government data processing; redundancy; system recovery; SRAM-based FPGA; adaptive reconfigurable voting; aerospace industry; enhanced reliability; error recovery process; fault mitigation; fault-handling mechanism; medium-grained TMR architecture; medium-grained fault tolerant architecture; memory footprint; permanent error; runtime adaptive OBP; runtime adaptive on-board processor; soft error; Circuit faults; Fault tolerant systems; Field programmable gate arrays; Redundancy; Runtime; Tunneling magnetoresistance; ICAP-based voting; TMR voting; TMR with spare; adaptive voter; fully reconfigurable TMR; gcapture; medium-grained TMR; on-board processor; scalable partial reconfiguration; soft and permanent errors;
Conference_Titel :
Adaptive Hardware and Systems (AHS), 2015 NASA/ESA Conference on
Conference_Location :
Montreal, QC
DOI :
10.1109/AHS.2015.7231165