Title :
A 0.9GHz–5.8GHz SDR receiver front-end with transformer-based current-gain boosting and 81-dB 3rd-order-harmonic rejection ratio
Author :
Ng, Alan W. L. ; Zheng, Shao Yong ; Leung, Henry ; Chao, Yu-Lin ; Luong, Howard C.
Author_Institution :
Dept. of Comput. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong, China
Abstract :
A 0.9GHz-to-5.8GHz SDR RFE is presented employing a dual-band LNA with a switchable 3-coil transformer as loading for current-gain boosting and an automatic LO phase-error detection and calibration circuitry for harmonic rejection. Fabricated in 65nm CMOS and integrated with a fully-integrated all-digital synthesizer (ADFS), the RFE measures NF between 2.9dB and 3.8dB, IIP3 between -1.6dBm and -12.8dBm, 3rd-order HRR of 81dB, and 5th-order HRR of 70dB, while consuming between 66mA and 82mA from a 1.2V and occupying a total chip area of 4.2 mm2.
Keywords :
CMOS integrated circuits; UHF amplifiers; UHF integrated circuits; calibration; coils; integrated circuit measurement; low noise amplifiers; microwave amplifiers; microwave integrated circuits; phase detectors; radio receivers; software radio; transformers; 3rd-order-harmonic rejection ratio; 5th-order HRR; ADFS; CMOS technology; RFE; SDR receiver front-end; automatic LO phase-error detection; calibration circuit; current 66 mA; current 82 mA; dual-band LNA; frequency 0.9 GHz to 5.8 GHz; fully-integrated all-digital synthesizer; gain 70 dB; gain 81 dB; noise figure 2.9 dB; noise figure 3.8 dB; size 65 nm; switchable 3-coil transformer; transformer-based current-gain; voltage 1.2 V; CMOS integrated circuits; Calibration; Gain; Harmonic analysis; Mixers; Noise measurement; Receivers; RFE; SDR; harmonic rejection; receiver; transformer;
Conference_Titel :
ESSCIRC (ESSCIRC), 2013 Proceedings of the
Conference_Location :
Bucharest
Print_ISBN :
978-1-4799-0643-7
DOI :
10.1109/ESSCIRC.2013.6649102
