Title :
An overview of Double-Gate MOSFETs
Author :
Neudeck, Gerold W.
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
fDate :
30 June-2 July 2003
Abstract :
The Double-Gate (DG) Fully Depleted (FD) SOI MOSFET, and its many implementations, is the leading device candidate for Silicon nano-scale CMOS. Their main characteristics, as compared to the single gate bulk MOSTET, are less S/D capacitance, larger saturated current drive, smaller short channel effects (DIBL), scalability to L=10 nm, near ideal subthreshold slopes (S), and the possibility of electrically adjustable threshold voltages.
Keywords :
MOSFET; capacitance; silicon-on-insulator; 10 nm; DIBL; capacitance; double gate fully depleted SOI MOSFET; silicon nanoscale CMOS; smaller short channel effects; Circuit simulation; Dielectric materials; FinFETs; MOSFETs; Microprocessors; Nanoscale devices; Parasitic capacitance; Scalability; Silicon on insulator technology; Threshold voltage;
Conference_Titel :
University/Government/Industry Microelectronics Symposium, 2003. Proceedings of the 15th Biennial
Print_ISBN :
0-7803-7972-1
DOI :
10.1109/UGIM.2003.1225728
