DocumentCode :
1962468
Title :
Optimization of Enzymatic Logic Gates and Networks for Noise Reduction and Stability
Author :
Arugula, Mary A. ; Halámek, Jan ; Katz, Evgeny ; Melnikov, Dmitriy ; Pita, Marcos ; Privman, Vladimir ; Strack, Guinevere
Author_Institution :
Dept. of Chem. & Biomol. Sci., Clarkson Univ., Potsdam, NY, USA
fYear :
2009
fDate :
11-16 Oct. 2009
Firstpage :
1
Lastpage :
7
Abstract :
Biochemical computing attempts to process information with biomolecules and biological objects. In this work we review our results on analysis and optimization of single biochemical logic gates based on enzymatic reactions, and a network of three gates, for reduction of the "analog" noise buildup. For a single gate, optimization is achieved by analyzing the enzymatic reactions within a framework of kinetic equations. We demonstrate that using co-substrates with much smaller affinities than the primary substrate, a negligible increase in the noise output from the logic gate is obtained as compared to the input noise. A network of enzymatic gates is analyzed by varying selective inputs and fitting standardized few-parameters response functions assumed for each gate. This allows probing of the individual gate quality but primarily yields information on the relative contribution of the gates to noise amplification. The derived information is then used to modify experimental single gate and network systems to operate them in a regime of reduced analog noise amplification.
Keywords :
biochemistry; biocomputing; enzymes; logic gates; molecular biophysics; molecular electronics; biochemical computing; biochemical logic gates; biological objects; biomolecules; enzymatic logic gates; enzymatic reactions; kinetic equations; noise amplification; noise reduction; noise stability; primary substrate; response functions; Biology computing; Chemicals; Computer networks; Fault tolerance; Information processing; Logic gates; Molecular biophysics; Noise reduction; Quantum computing; Stability; analog noise; biocomputing; enzyme; logic gate; optimization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advances in Circuits, Electronics and Micro-electronics, 2009. CENICS '09. Second International Conference on
Conference_Location :
Sliema
Print_ISBN :
978-0-7695-3832-7
Type :
conf
DOI :
10.1109/CENICS.2009.8
Filename :
5291515
Link To Document :
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