DocumentCode :
1962935
Title :
Optimization of Bosch etch process for through wafer interconnects
Author :
Kenoyer, Linda ; Oxford, Rex ; Moll, Amy
Author_Institution :
Coll. of Eng., Boise State Univ., ID, USA
fYear :
2003
fDate :
30 June-2 July 2003
Firstpage :
338
Lastpage :
339
Abstract :
The Bosch etch process was utilized to create 50 micrometer vias with an aspect ration of 10:1 in silicon wafers for through wafer interconnects. The process is complex with twenty-two separate parameters required to control the process. Deviating from the standard process and flowing SF6 during the deposition process resulted in a more stable and reproducible process.
Keywords :
elemental semiconductors; integrated circuit interconnections; process control; silicon; sputter etching; Bosch etch process; SF6 flow; deposition; micrometer; optimization; process control; reproducible process; silicon wafers; wafer interconnects; Cleaning; Educational institutions; Etching; Packaging; Passivation; Polymers; Power engineering and energy; Radio frequency; Sulfur hexafluoride; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
University/Government/Industry Microelectronics Symposium, 2003. Proceedings of the 15th Biennial
ISSN :
0749-6877
Print_ISBN :
0-7803-7972-1
Type :
conf
DOI :
10.1109/UGIM.2003.1225759
Filename :
1225759
Link To Document :
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