DocumentCode
1963185
Title
A design technique of TSC checker for Borden´s code
Author
Biswas, Gosta Pada ; Sengupta, Indranil
Author_Institution
Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kharagpur, India
fYear
1997
fDate
4-7 Jan 1997
Firstpage
529
Lastpage
530
Abstract
A systematic method of designing TSC checker for a class (even code length) of Borden´s code is proposed, where a modular approach is used. In a comparative study, it is found that the proposed method is much better and has a larger capability than previous methods in designing the checker
Keywords
automatic testing; error detection codes; Borden code; TSC checker; design; optimal t-UED code; Built-in self-test; Circuits; Computer science; Costs; Design methodology; Hardware; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1997. Proceedings., Tenth International Conference on
Conference_Location
Hyderabad
ISSN
1063-9667
Print_ISBN
0-8186-7755-4
Type
conf
DOI
10.1109/ICVD.1997.568199
Filename
568199
Link To Document